[Roccc-discussion] System code compilation
Giuseppe Cascone
giuseppe.cascone at unina.it
Tue Feb 9 04:44:35 PST 2010
Dear Jason, Dear all,
I'm carrying out some experiments on C-to-VHDL compiling using
ROCCC and I wanted to ask a question about the compilation of
System code.
I assume that the variables in System code that are written but not
read - let's say leaf nodes in the data flow graph - eventually become
output ports in the generated VHDL entity. Let's take as
an example the B array in the FIR-system example. If so, why does the
i variable in the cited example appear in the generated VHDL as
output port? I found that in the previous version of ROCCC, the 0.3
one, this does not happen, and the component declaration of the
FIR-system module in the testbench code doesn't show that output port
as well.
I'd be grateful if you could help me.
Kind regards,
--
Giuseppe Cascone
Ph.D. Student
SecLab Group (Room 4.03)
Dipartimento di Informatica e Sistemistica
Università degli Studi di Napoli Federico II
via Claudio 21 - 80125 Napoli, ITALY
e-mail: giuseppe.cascone at unina.it
web: http://www.seclab.unina.it
Tel: +39 081 7683828
Cell: + 39 3208348400
Fax: +39 081 7683816
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Dear Jason, dear all,
I'm carrying out some experiments on C-to-VHDL compiling using
ROCCC and I wanted to ask you a question about the compilation of
System code.
I assume that the variables in System code that are written but not
read - let's say leaf nodes in the data flow graph - eventually become
output ports in the corresponding VHDL entity generated. Let's take as
an example the B array in the FIR-system example. If so, why does the
"i" variable in the cited example appear in the generated VHDL as
output port? I found that in the previous version of ROCCC, the 0.3
one, this does not happen, and the component declaration of the
FIR-system module in the testbench code doesn't show that output port
as well.
I'd be grateful if you could help me.
Kind regards,
--
Giuseppe Cascone
Ph.D. Student
SecLab Group (Room 4.03)
Dipartimento di Informatica e Sistemistica
Università degli Studi di Napoli Federico II
via Claudio 21 - 80125 Napoli, ITALY
e-mail: giuseppe.cascone at unina.it
web: http://www.seclab.unina.it
Tel: +39 081 7683829
Fax: +39 081 7683816
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